PeopleofSuperintelligence

Researcher

Andrew Putnam

Andrew Putnam is a hardware researcher whose work connects programmable chips, cloud AI and energy-efficient computer architecture. He studied electrical engineering, computer science and physics at the University of San Diego, graduating in 2003, and earned a computer science and engineering PhD at the University of Washington in 2009. A co-founder of Microsoft's Project Catapult, he helped develop FPGA acceleration for Bing and later worked on Azure Accelerated Networking, Project Brainwave and Azure Boost. His 2026 research included Copilot-assisted verification of FPGA designs and CoddSpeed, which won SIGMOD's Industrial Track Best Paper award. As of October 2026, he is a Partner/GM of Cloud & AI Hardware Engineering at Microsoft Research and an affiliate assistant professor in electrical and computer engineering at the University of Washington.

Works
52
Citations
3,281
h-index
21
Badges

Publication numbers from OpenAlex, as of 27 October 2026.

Timeline

  1. 2003–2009

    Degrees in computing and physics

    He earns a dual BA/BS at the University of San Diego in 2003, with a triple major in electrical engineering, computer science and physics. At the University of Washington, he completes an MS in 2006 and a PhD in 2009 in Computer Science & Engineering, advised by Susan Eggers and Mark Oskin.

  2. 2009–2010

    The first Catapult design

    He joins Microsoft Research after graduating in 2009. In December 2010, he sketches hardware for Doug Burger to run Bing's machine learning algorithms on field-programmable gate arrays (FPGAs).

  3. June 2014

    Catapult accelerates Bing search

    A co-founder of Project Catapult, Putnam coauthors A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services in June 2014. Tested on 1,632 servers, the system increases Bing ranking throughput per server by 95% under high load at a fixed latency distribution.

  4. 2016

    Moving into Azure Networking

    In 2016, he moves his research into practical applications within Azure Networking.

  5. April 2018

    Azure Accelerated Networking

    He coauthors Azure Accelerated Networking: SmartNICs in the Public Cloud in April 2018. The system moves host networking onto FPGA-based Azure SmartNICs, which the team deploys on all new Azure servers from late 2015 across a fleet of more than one million hosts.

  6. 2020–2025

    Leadership in Azure Hardware

    He takes a leadership role in Azure Hardware in 2020. By March 2025, he is Partner General Manager of Cloud & AI Hardware Engineering within Microsoft's Azure Hardware Systems & Infrastructure (AHSI) group, with work on Azure Accelerated Networking, Project Brainwave and Azure Boost.

  7. February 2026

    Copilot for FPGA verification

    In February 2026, he coauthors AI-Assisted Copilot Automation for Reliable FPGA Verification at Hyperscale. The method combines Copilot-generated Python scripts with formal checks of signal connections and reset behavior; a deployment over nine months finds critical bugs missed by weeks of simulation.

  8. 2026

    CoddSpeed and a SIGMOD award

    In May 2026, he coauthors CoddSpeed: Hardware Accelerated Query Processing in Microsoft Fabric, which describes running Fabric analytics on accelerators including GPUs, FPGAs and ASICs. The paper wins SIGMOD's Industrial Track Best Paper award in 2026.

  9. As of October 2026

    Back at Microsoft Research

    As of October 2026, he is back at Microsoft Research as Partner/GM of Cloud & AI Hardware Engineering after roles in Azure Networking and Azure Hardware Systems & Infrastructure. His research covers FPGA acceleration of data center applications and energy-efficient computer architectures. He also serves as an affiliate assistant professor in the University of Washington's Department of Electrical & Computer Engineering.

Career

  1. NowMicrosoft ResearchPartner/GM of Cloud & AI Hardware Engineering
  2. NowUniversity of WashingtonAffiliate assistant professor in Electrical & Computer Engineering
  3. From 2020MicrosoftPartner General Manager of Cloud & AI Hardware Engineering
  4. From 2016Microsoft
  5. From 2009Microsoft Research

Education

  1. 2009University of WashingtonPhD in Computer Science & Engineering
  2. 2006University of WashingtonMS in Computer Science & Engineering
  3. 2003University of San DiegoDual BA/BS in electrical engineering, computer science and physics

From the biography and OpenAlex affiliations (the years of papers that list the organization), so some years are approximate.

Checked career sources: systemx.stanford.edu.

Colleagues

People named in this biography, and people with dated positions at the same organization in the same years.

Sources and credits

Photo: We have no published photo of Andrew Putnam yet. Send us a free-licensed photo.

  1. Andrew Putnam at Microsoft Research microsoft.com. Checked 27 October 2026.
  2. Allen School News Archive » Wired profiles Microsoft’s Project Catapult and the key role of UW CSE Ph.D. alum Andrew Putnam news.cs.washington.edu. Checked 27 October 2026.
  3. A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services - Microsoft Research microsoft.com. Checked 27 October 2026.
  4. Andrew Putnam at Microsoft Research microsoft.com. Checked 27 October 2026.
  5. Cloud Acceleration Harmony: The Role of FPGAs in a GPU-Dominated Landscape | SystemX Alliance systemx.stanford.edu. Checked 27 October 2026.
  6. Azure Accelerated Networking: SmartNICs in the Public Cloud - Microsoft Research microsoft.com. Checked 27 October 2026.
  7. AI-Assisted Copilot Automation for Reliable FPGA Verification at Hyperscale - Microsoft Research microsoft.com. Checked 27 October 2026.
  8. CoddSpeed: Hardware Accelerated Query Processing in Microsoft Fabric - Microsoft Research microsoft.com. Checked 27 October 2026.
  9. Andrew Putnam at Microsoft Research microsoft.com. Checked 27 October 2026.
  10. Andrew Putnam | UW Department of Electrical & Computer Engineering ee.washington.edu. Checked 27 October 2026.